752 lines
25 KiB
C#
752 lines
25 KiB
C#
// This Source Code Form is subject to the terms of the Mozilla Public License, v. 2.0.
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// If a copy of the MPL was not distributed with this file, You can obtain one at http://mozilla.org/MPL/2.0/.
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// Copyright (C) LibreHardwareMonitor and Contributors.
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// Partial Copyright (C) Michael Möller <mmoeller@openhardwaremonitor.org> and Contributors.
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// All Rights Reserved.
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using System;
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using System.Collections.Generic;
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using System.Globalization;
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using System.Text;
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using System.Threading;
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using LibreHardwareMonitor.Hardware.Cpu;
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namespace LibreHardwareMonitor.Hardware.Motherboard.Lpc;
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internal class LpcIO
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{
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private readonly StringBuilder _report = new();
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private readonly List<ISuperIO> _superIOs = new();
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public LpcIO(Motherboard motherboard)
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{
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if (!Ring0.IsOpen || !Mutexes.WaitIsaBus(100))
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return;
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Detect(motherboard);
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Mutexes.ReleaseIsaBus();
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if (Ipmi.IsBmcPresent())
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_superIOs.Add(new Ipmi(motherboard.Manufacturer));
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}
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public ISuperIO[] SuperIO => _superIOs.ToArray();
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private void ReportUnknownChip(LpcPort port, string type, int chip)
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{
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_report.Append("Chip ID: Unknown ");
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_report.Append(type);
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_report.Append(" with ID 0x");
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_report.Append(chip.ToString("X", CultureInfo.InvariantCulture));
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_report.Append(" at 0x");
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_report.Append(port.RegisterPort.ToString("X", CultureInfo.InvariantCulture));
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_report.Append("/0x");
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_report.AppendLine(port.ValuePort.ToString("X", CultureInfo.InvariantCulture));
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_report.AppendLine();
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}
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private bool DetectSmsc(LpcPort port)
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{
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port.SmscEnter();
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ushort chipId = port.ReadWord(CHIP_ID_REGISTER);
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if (chipId is not 0 and not 0xffff)
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{
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port.SmscExit();
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ReportUnknownChip(port, "SMSC", chipId);
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}
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return false;
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}
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private void Detect(Motherboard motherboard)
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{
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for (int i = 0; i < REGISTER_PORTS.Length; i++)
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{
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var port = new LpcPort(REGISTER_PORTS[i], VALUE_PORTS[i]);
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if (DetectWinbondFintek(port)) continue;
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if (DetectIT87(port, motherboard)) continue;
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if (DetectSmsc(port)) continue;
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}
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}
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public string GetReport()
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{
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if (_report.Length > 0)
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{
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return "LpcIO" + Environment.NewLine + Environment.NewLine + _report;
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}
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return null;
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}
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private bool DetectWinbondFintek(LpcPort port)
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{
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port.WinbondNuvotonFintekEnter();
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byte logicalDeviceNumber = 0;
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byte id = port.ReadByte(CHIP_ID_REGISTER);
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byte revision = port.ReadByte(CHIP_REVISION_REGISTER);
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Chip chip = Chip.Unknown;
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switch (id)
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{
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case 0x05:
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switch (revision)
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{
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case 0x07:
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chip = Chip.F71858;
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logicalDeviceNumber = F71858_HARDWARE_MONITOR_LDN;
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break;
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case 0x41:
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chip = Chip.F71882;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x06:
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switch (revision)
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{
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case 0x01:
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chip = Chip.F71862;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x07:
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switch (revision)
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{
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case 0x23:
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chip = Chip.F71889F;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x08:
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switch (revision)
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{
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case 0x14:
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chip = Chip.F71869;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x09:
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switch (revision)
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{
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case 0x01:
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chip = Chip.F71808E;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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case 0x09:
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chip = Chip.F71889ED;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x10:
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switch (revision)
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{
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case 0x05:
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chip = Chip.F71889AD;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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case 0x07:
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chip = Chip.F71869A;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x11:
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switch (revision)
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{
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case 0x06:
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chip = Chip.F71878AD;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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case 0x18:
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chip = Chip.F71811;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x52:
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switch (revision)
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{
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case 0x17:
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case 0x3A:
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case 0x41:
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chip = Chip.W83627HF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x82:
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switch (revision & 0xF0)
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{
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case 0x80:
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chip = Chip.W83627THF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x85:
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switch (revision)
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{
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case 0x41:
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chip = Chip.W83687THF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0x88:
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switch (revision & 0xF0)
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{
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case 0x50:
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case 0x60:
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chip = Chip.W83627EHF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xA0:
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switch (revision & 0xF0)
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{
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case 0x20:
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chip = Chip.W83627DHG;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xA5:
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switch (revision & 0xF0)
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{
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case 0x10:
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chip = Chip.W83667HG;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xB0:
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switch (revision & 0xF0)
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{
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case 0x70:
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chip = Chip.W83627DHGP;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xB3:
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switch (revision & 0xF0)
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{
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case 0x50:
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chip = Chip.W83667HGB;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xB4:
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switch (revision & 0xF0)
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{
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case 0x70:
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chip = Chip.NCT6771F;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xC3:
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switch (revision & 0xF0)
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{
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case 0x30:
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chip = Chip.NCT6776F;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xC4:
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switch (revision & 0xF0)
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{
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case 0x50:
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chip = Chip.NCT610XD;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xC5:
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switch (revision & 0xF0)
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{
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case 0x60:
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chip = Chip.NCT6779D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xC7:
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switch (revision)
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{
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case 0x32:
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chip = Chip.NCT6683D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xC8:
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switch (revision)
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{
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case 0x03:
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chip = Chip.NCT6791D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xC9:
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switch (revision)
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{
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case 0x11:
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chip = Chip.NCT6792D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x13:
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chip = Chip.NCT6792DA;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xD1:
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switch (revision)
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{
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case 0x21:
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chip = Chip.NCT6793D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xD3:
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switch (revision)
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{
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case 0x52:
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chip = Chip.NCT6795D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xD4:
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switch (revision)
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{
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case 0x23:
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chip = Chip.NCT6796D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x2A:
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chip = Chip.NCT6796DR;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x51:
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chip = Chip.NCT6797D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x2B:
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chip = Chip.NCT6798D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x40:
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case 0x41:
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chip = Chip.NCT6686D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xD5:
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switch (revision)
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{
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case 0x92:
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chip = Chip.NCT6687D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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case 0xD8:
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switch (revision)
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{
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case 0x02:
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chip = Chip.NCT6799D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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}
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break;
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}
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if (chip == Chip.Unknown)
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{
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if (id is not 0 and not 0xff)
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{
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port.WinbondNuvotonFintekExit();
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ReportUnknownChip(port, "Winbond / Nuvoton / Fintek", (id << 8) | revision);
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}
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}
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else
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{
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port.Select(logicalDeviceNumber);
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ushort address = port.ReadWord(BASE_ADDRESS_REGISTER);
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Thread.Sleep(1);
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ushort verify = port.ReadWord(BASE_ADDRESS_REGISTER);
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ushort vendorId = port.ReadWord(FINTEK_VENDOR_ID_REGISTER);
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// disable the hardware monitor i/o space lock on NCT679XD chips
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if (address == verify &&
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chip is Chip.NCT6791D or Chip.NCT6792D or Chip.NCT6792DA or Chip.NCT6793D or Chip.NCT6795D or Chip.NCT6796D or Chip.NCT6796DR or Chip.NCT6798D or Chip.NCT6797D or Chip.NCT6799D)
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{
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port.NuvotonDisableIOSpaceLock();
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}
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port.WinbondNuvotonFintekExit();
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if (address != verify)
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{
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_report.Append("Chip ID: 0x");
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_report.AppendLine(chip.ToString("X"));
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_report.Append("Chip revision: 0x");
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_report.AppendLine(revision.ToString("X", CultureInfo.InvariantCulture));
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_report.AppendLine("Error: Address verification failed");
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_report.AppendLine();
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return false;
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}
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// some Fintek chips have address register offset 0x05 added already
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if ((address & 0x07) == 0x05)
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address &= 0xFFF8;
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if (address < 0x100 || (address & 0xF007) != 0)
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{
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_report.Append("Chip ID: 0x");
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_report.AppendLine(chip.ToString("X"));
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_report.Append("Chip revision: 0x");
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_report.AppendLine(revision.ToString("X", CultureInfo.InvariantCulture));
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_report.Append("Error: Invalid address 0x");
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_report.AppendLine(address.ToString("X", CultureInfo.InvariantCulture));
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_report.AppendLine();
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return false;
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}
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switch (chip)
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{
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case Chip.W83627DHG:
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case Chip.W83627DHGP:
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case Chip.W83627EHF:
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case Chip.W83627HF:
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case Chip.W83627THF:
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case Chip.W83667HG:
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case Chip.W83667HGB:
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case Chip.W83687THF:
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_superIOs.Add(new W836XX(chip, revision, address));
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break;
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case Chip.NCT610XD:
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case Chip.NCT6771F:
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case Chip.NCT6776F:
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case Chip.NCT6779D:
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case Chip.NCT6791D:
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case Chip.NCT6792D:
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case Chip.NCT6792DA:
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case Chip.NCT6793D:
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case Chip.NCT6795D:
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case Chip.NCT6796D:
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case Chip.NCT6796DR:
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case Chip.NCT6797D:
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case Chip.NCT6798D:
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case Chip.NCT6799D:
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case Chip.NCT6686D:
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case Chip.NCT6687D:
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case Chip.NCT6683D:
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_superIOs.Add(new Nct677X(chip, revision, address, port));
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break;
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case Chip.F71858:
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case Chip.F71862:
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case Chip.F71869:
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case Chip.F71878AD:
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case Chip.F71869A:
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case Chip.F71882:
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case Chip.F71889AD:
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case Chip.F71889ED:
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case Chip.F71889F:
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case Chip.F71808E:
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if (vendorId != FINTEK_VENDOR_ID)
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{
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_report.Append("Chip ID: 0x");
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_report.AppendLine(chip.ToString("X"));
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_report.Append("Chip revision: 0x");
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_report.AppendLine(revision.ToString("X", CultureInfo.InvariantCulture));
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_report.Append("Error: Invalid vendor ID 0x");
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_report.AppendLine(vendorId.ToString("X", CultureInfo.InvariantCulture));
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_report.AppendLine();
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return false;
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}
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_superIOs.Add(new F718XX(chip, address));
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break;
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}
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return true;
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}
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return false;
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}
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private bool DetectIT87(LpcPort port, Motherboard motherboard)
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{
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// IT87XX can enter only on port 0x2E
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// IT8792 using 0x4E
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if (port.RegisterPort is not 0x2E and not 0x4E)
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return false;
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// Read the chip ID before entering.
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// If already entered (not 0xFFFF) and the register port is 0x4E, it is most likely bugged and should be left alone.
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// Entering IT8792 in this state will result in IT8792 reporting with chip ID of 0x8883.
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if (port.RegisterPort != 0x4E || !port.TryReadWord(CHIP_ID_REGISTER, out ushort chipId))
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{
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port.IT87Enter();
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chipId = port.ReadWord(CHIP_ID_REGISTER);
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}
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Chip chip = chipId switch
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{
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0x8613 => Chip.IT8613E,
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0x8620 => Chip.IT8620E,
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0x8625 => Chip.IT8625E,
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0x8628 => Chip.IT8628E,
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0x8631 => Chip.IT8631E,
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0x8665 => Chip.IT8665E,
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0x8655 => Chip.IT8655E,
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|
0x8686 => Chip.IT8686E,
|
|
0x8688 => Chip.IT8688E,
|
|
0x8689 => Chip.IT8689E,
|
|
0x8696 => Chip.IT8696E,
|
|
0x8705 => Chip.IT8705F,
|
|
0x8712 => Chip.IT8712F,
|
|
0x8716 => Chip.IT8716F,
|
|
0x8718 => Chip.IT8718F,
|
|
0x8720 => Chip.IT8720F,
|
|
0x8721 => Chip.IT8721F,
|
|
0x8726 => Chip.IT8726F,
|
|
0x8728 => Chip.IT8728F,
|
|
0x8771 => Chip.IT8771E,
|
|
0x8772 => Chip.IT8772E,
|
|
0x8790 => Chip.IT8790E,
|
|
0x8733 => Chip.IT8792E,
|
|
0x8695 => Chip.IT87952E,
|
|
_ => Chip.Unknown
|
|
};
|
|
|
|
if (chip == Chip.Unknown)
|
|
{
|
|
if (chipId is not 0 and not 0xffff)
|
|
{
|
|
port.IT87Exit();
|
|
|
|
ReportUnknownChip(port, "ITE", chipId);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
port.Select(IT87_ENVIRONMENT_CONTROLLER_LDN);
|
|
|
|
ushort address = port.ReadWord(BASE_ADDRESS_REGISTER);
|
|
Thread.Sleep(1);
|
|
ushort verify = port.ReadWord(BASE_ADDRESS_REGISTER);
|
|
|
|
byte version = (byte)(port.ReadByte(IT87_CHIP_VERSION_REGISTER) & 0x0F);
|
|
|
|
ushort gpioAddress;
|
|
ushort gpioVerify;
|
|
|
|
if (chip == Chip.IT8705F)
|
|
{
|
|
port.Select(IT8705_GPIO_LDN);
|
|
gpioAddress = port.ReadWord(BASE_ADDRESS_REGISTER);
|
|
Thread.Sleep(1);
|
|
gpioVerify = port.ReadWord(BASE_ADDRESS_REGISTER);
|
|
}
|
|
else
|
|
{
|
|
port.Select(IT87XX_GPIO_LDN);
|
|
gpioAddress = port.ReadWord(BASE_ADDRESS_REGISTER + 2);
|
|
Thread.Sleep(1);
|
|
gpioVerify = port.ReadWord(BASE_ADDRESS_REGISTER + 2);
|
|
}
|
|
|
|
IGigabyteController gigabyteController = FindGigabyteEC(port, chip, motherboard);
|
|
|
|
port.IT87Exit();
|
|
|
|
if (address != verify || address < 0x100 || (address & 0xF007) != 0)
|
|
{
|
|
_report.Append("Chip ID: 0x");
|
|
_report.AppendLine(chip.ToString("X"));
|
|
_report.Append("Error: Invalid address 0x");
|
|
_report.AppendLine(address.ToString("X", CultureInfo.InvariantCulture));
|
|
_report.AppendLine();
|
|
|
|
return false;
|
|
}
|
|
|
|
if (gpioAddress != gpioVerify || gpioAddress < 0x100 || (gpioAddress & 0xF007) != 0)
|
|
{
|
|
_report.Append("Chip ID: 0x");
|
|
_report.AppendLine(chip.ToString("X"));
|
|
_report.Append("Error: Invalid GPIO address 0x");
|
|
_report.AppendLine(gpioAddress.ToString("X", CultureInfo.InvariantCulture));
|
|
_report.AppendLine();
|
|
|
|
return false;
|
|
}
|
|
|
|
_superIOs.Add(new IT87XX(chip, address, gpioAddress, version, motherboard, gigabyteController));
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
private IGigabyteController FindGigabyteEC(LpcPort port, Chip chip, Motherboard motherboard)
|
|
{
|
|
// The controller only affects the 2nd ITE chip if present, and only a few
|
|
// models are known to use this controller.
|
|
// IT8795E likely to need this too, but may use different registers.
|
|
if (motherboard.Manufacturer != Manufacturer.Gigabyte || port.RegisterPort != 0x4E || chip is not (Chip.IT8790E or Chip.IT8792E or Chip.IT87952E))
|
|
return null;
|
|
|
|
Vendor vendor = DetectVendor();
|
|
|
|
IGigabyteController gigabyteController = FindGigabyteECUsingSmfi(port, chip, vendor);
|
|
if (gigabyteController != null)
|
|
return gigabyteController;
|
|
|
|
// ECIO is only available on AMD motherboards with IT8791E/IT8792E/IT8795E.
|
|
if (chip == Chip.IT8792E && vendor == Vendor.AMD)
|
|
{
|
|
gigabyteController = EcioPortGigabyteController.TryCreate();
|
|
if (gigabyteController != null)
|
|
return gigabyteController;
|
|
}
|
|
|
|
return null;
|
|
|
|
Vendor DetectVendor()
|
|
{
|
|
string manufacturer = motherboard.SMBios.Processors[0].ManufacturerName;
|
|
if (manufacturer.IndexOf("Intel", StringComparison.OrdinalIgnoreCase) != -1)
|
|
return Vendor.Intel;
|
|
|
|
if (manufacturer.IndexOf("Advanced Micro Devices", StringComparison.OrdinalIgnoreCase) != -1 || manufacturer.StartsWith("AMD", StringComparison.OrdinalIgnoreCase))
|
|
return Vendor.AMD;
|
|
|
|
return Vendor.Unknown;
|
|
}
|
|
}
|
|
|
|
private IGigabyteController FindGigabyteECUsingSmfi(LpcPort port, Chip chip, Vendor vendor)
|
|
{
|
|
port.Select(IT87XX_SMFI_LDN);
|
|
|
|
// Check if the SMFI logical device is enabled
|
|
byte enabled = port.ReadByte(IT87_LD_ACTIVE_REGISTER);
|
|
Thread.Sleep(1);
|
|
byte enabledVerify = port.ReadByte(IT87_LD_ACTIVE_REGISTER);
|
|
|
|
// The EC has no SMFI or it's RAM access is not enabled, assume the controller is not present
|
|
if (enabled != enabledVerify || enabled == 0)
|
|
return null;
|
|
|
|
// Read the host RAM address that maps to the Embedded Controller's RAM (two registers).
|
|
uint addressHi = 0;
|
|
uint addressHiVerify = 0;
|
|
uint address = port.ReadWord(IT87_SMFI_HLPC_RAM_BASE_ADDRESS_REGISTER);
|
|
if (chip == Chip.IT87952E)
|
|
addressHi = port.ReadByte(IT87_SMFI_HLPC_RAM_BASE_ADDRESS_REGISTER_HIGH);
|
|
|
|
Thread.Sleep(1);
|
|
uint addressVerify = port.ReadWord(IT87_SMFI_HLPC_RAM_BASE_ADDRESS_REGISTER);
|
|
if (chip == Chip.IT87952E)
|
|
addressHiVerify = port.ReadByte(IT87_SMFI_HLPC_RAM_BASE_ADDRESS_REGISTER_HIGH);
|
|
|
|
if ((address != addressVerify) || (addressHi != addressHiVerify))
|
|
return null;
|
|
|
|
// Address is xryy, Host Address is FFyyx000
|
|
// For IT87952E, Address is rzxryy, Host Address is (0xFC000000 | 0x0zyyx000)
|
|
uint hostAddress;
|
|
if (chip == Chip.IT87952E)
|
|
hostAddress = 0xFC000000;
|
|
else
|
|
hostAddress = 0xFF000000;
|
|
|
|
hostAddress |= (address & 0xF000) | ((address & 0xFF) << 16) | ((addressHi & 0xF) << 24);
|
|
|
|
return new IsaBridgeGigabyteController(hostAddress, vendor);
|
|
}
|
|
|
|
// ReSharper disable InconsistentNaming
|
|
private const byte BASE_ADDRESS_REGISTER = 0x60;
|
|
private const byte CHIP_ID_REGISTER = 0x20;
|
|
private const byte CHIP_REVISION_REGISTER = 0x21;
|
|
|
|
private const byte F71858_HARDWARE_MONITOR_LDN = 0x02;
|
|
private const byte FINTEK_HARDWARE_MONITOR_LDN = 0x04;
|
|
private const byte IT87_ENVIRONMENT_CONTROLLER_LDN = 0x04;
|
|
private const byte IT8705_GPIO_LDN = 0x05;
|
|
private const byte IT87XX_GPIO_LDN = 0x07;
|
|
|
|
// Shared Memory/Flash Interface
|
|
private const byte IT87XX_SMFI_LDN = 0x0F;
|
|
private const byte WINBOND_NUVOTON_HARDWARE_MONITOR_LDN = 0x0B;
|
|
|
|
private const ushort FINTEK_VENDOR_ID = 0x1934;
|
|
|
|
private const byte FINTEK_VENDOR_ID_REGISTER = 0x23;
|
|
private const byte IT87_CHIP_VERSION_REGISTER = 0x22;
|
|
private const byte IT87_SMFI_HLPC_RAM_BASE_ADDRESS_REGISTER = 0xF5;
|
|
private const byte IT87_SMFI_HLPC_RAM_BASE_ADDRESS_REGISTER_HIGH = 0xFC;
|
|
private const byte IT87_LD_ACTIVE_REGISTER = 0x30;
|
|
|
|
private readonly ushort[] REGISTER_PORTS = { 0x2E, 0x4E };
|
|
private readonly ushort[] VALUE_PORTS = { 0x2F, 0x4F };
|
|
// ReSharper restore InconsistentNaming
|
|
}
|